Modern radio frequency (RF) receivers oftentimes include a frequency translation circuit that receives RF signals from a RF front end, translates the RF signals into a lower frequency band, and outputs the lower frequency signals for further processing. For instance, a frequency translation circuit may be implemented to translate RF input signals to intermediate frequency (IF) signals. Frequency translation circuits also may be used in RF transmitters to translate lower frequency signals, such as IF signals, to higher frequency bands, for example to generate RF output signals.
An example of a frequency translation circuit 100 is depicted in FIG. 1. The frequency translation circuit 100 commonly may include a dynamically matched mixing stage (hereinafter “mixing stage”) 102. The mixing stage 102 typically is used to perform frequency translation (e.g. down-conversion or up-conversion) on an input signal 104 to generate an output signal 106. In a common configuration, the mixing stage 102 may include a mixer 108, a dynamic matching network 110 on an input side of the mixer 108, and a dynamic matching network 112 on an output side of the mixer 108.
To perform frequency translation, the mixing stage 102 mixes the input signal 104 with a local oscillator (LO) signal 114. In a common configuration, the LO signal 114 may be generated by a voltage controlled oscillator (VCO) 118 that is coupled to other circuit components, such as a duty cycle adjustment module 120, a quadrature generator 122 and a buffer circuit 124.
A mitigation signal 116 oftentimes is used to drive switching in the dynamic matching networks 110, 112 between in-phase and quadrature phase branches of the mixer 108 in order to reduce spurious frequency interference, or intermodulation distortion, in the output signal 106 caused by non-linearities of the mixer 108. To generate the mitigation signal 116, an appropriate clock signal may be selected with a switch 126 and communicated to a divider 128, which may generate the mitigation signal 116 from an odd-order sub-harmonic of the selected clock signal. The switch 126 can, for example, select the clock signal from the output of the duty cycle adjustment module 120, a pre-divider 130 that generates odd-order sub-harmonics of such signal, or a signal generated by a clock source 132 and corresponding duty cycle adjustment module 134.
While use of the mitigation signal 116 can help to reduce intermodulation distortion caused by the non-linearities of the mixer 108, the mitigation signal 116 itself may introduce additional spurious signals into the frequency translation circuit 100. Specifically, a square wave mitigation signal 116 includes a significant amount of energy at the square wave's fundamental frequency, as well as the odd harmonics of the fundamental frequency. These frequencies oftentimes mix with undesired off-channel spurious signals that couple into the frequency translation circuit 100 and, in consequence, generate additional on-channel spurious signals in the output signal 106.
RF pass-band filters can be used to filter the input signal 104 to attenuate the off-channel spurious signals that would otherwise mix with the mitigation signal 116, thus mitigating their negative effects on the output signal 106. However, if the frequencies of the off-channel spurious signals are close to the desired on-channel frequencies of the input signal 104, the filters necessary to suitably attenuate the off-channel spurious signals without adversely attenuating the input signal 104 become prohibitively expensive and complex due to the very high quality factor (Q) that is required of the filters.